Samsung Chromebook Pro RAM LPDDR3 upgrade additional information- ep3

This topic is an addition to the previous topic Samsung Chromebook Pro RAM LPDDR3 upgrade - ep2.
We previously talked about how to upgrade the RAM of the Samsung Chromebook Pro from 4GB to 16GB. However, I noticed something is missing when edit the firmware in that topic. We previously talked about modifying the RAM SPD in the SPI Flash to reflect the new memory. Upon further testing with more Samsung Chromebook Pro, I found out more editing in the ROM is needed. If you just replace the RAM and edit the RAM SPD, your chromebook will look like it is not going to power on at all. It will not does anything even if you try to do the EC or hardware reset. The chromebook is basically dead. You will feel like you failed the process when replacing the RAM.

If that happens, it can mean just that, you did not replace the RAM properly, or the RW_MRC_CACHE section in the ROM is still containing the old RAM training data. Since you are not suppose to replace the RAM, there is no such function in UEFI. It is not going to detect there is a change in RAM and retrain. You are going to do it manually. There is no easy way to force the chromebook to retrain the RAM. The only way I can think of is to edit the ROM manually.
You are going to need to have another computer which can use cbfstool. I used one with Fedora platform. You can use one with Ubuntu if you want.

First you need to have a copy of the already modified with 16GB RAM data ROM. You should have already created it from the previous article. Bring that ROM to the computer with cbfstool.

Install cbfstool on Fedora 41 or later

  1. Install Terra repository:

$ sudo dnf config-manager addrepo --from-repofile=https://terra.fyralabs.com/terra.repo

  1. Install cbfstool rpm package:

$ sudo dnf install cbfstool

Clear the RAM Training Cache
Let’s assume you have the rom copied to Download folder and you are in that folder now. The rom is called Chromebookpro.bin.
First you need to find out the size of the RW_MRC_CACHE region.

$ cbfstool Chromebookpro.bin layout | grep RW_MRC_CACHE
‘RW_MRC_CACHE’ (CBFS, size 65536, offset 12255232)

It should be 65536.
Then you create an empty rom for that region.

$ cbfstool RW_MRC_CACHE.bin create -m x86 -s 65536

Create a backup of the original rom.

$ cp Chromebookpro.bin Chromebookpro.bin.bak

Replace the memory training data.

$ cbfstool Chromebookpro.bin write -F -r RW_MRC_CACHE -f RW_MRC_CACHE.bin

Check the region to make sure it is now empty.

$ cbfstool Chromebookpro.bin print -r RW_MRC_CACHE

Now you have a ROM that is ready to flash. Get it back to your flashing computer and flash it to your SPI flash on the chromebook. It should now boot up normally.
Have fun.

sudo flashrom -p <programmer> -E --fmap -i RW_MRC_CACHE is all you need to clear the RAM training data

Good to know. Thanks. It comes in handy when I need to clear it later on. For the freshly modified RAM, you still do need to do it the hard way since after the RAM is modified, it does not boot up at all before clearing the training data. May be it will work with the Suzy Q cable? I will need to try it when I get my hands on one.

you can do this from an external programmer as well

Thanks. I will try programmer ch341a_spi next time.