Its there any way that I can modify mrchromebook`s coreboot to increase the amount of RAM allocated to the Intel integrated graphics?

I’m using my Chromebook as a KVM host machine with an Intel i5-10310U CPU, which supports GPU sharing with VMs(Intel gvt-g). However, the default GPU RAM allocation of 256MB in coreboot is too small to create additional VMs. If I increase the GPU RAM to 1000MB, I can create more VMs that share the host GPU. I found some relevant keywords in the coreboot source code, but I’m not sure how to modify the settings. Can anyone help with the steps to increase the GPU RAM allocation in coreboot?

Codes maybe related:
src/northbridge/intel/haswell/early_init.c:
/* Enable 256MB aperture */|
pci_update_config8(PCI_DEV(0, 2, 0), MSAC, ~0x06, 0x02);|

./src/mainboard/google/cyan/devicetree.cb:
register “PcdIgdDvmt50PreAlloc” = “1”

My device info:
device: hp c640
system: fedora
hardware_model: Google Dratini
cpu:Intel® Core™ i5-10310U × 8

Haswell is 4th gen, cyan is a braswell device. None of that is applicable to your device.

IgdDvmt50PreAlloc is the correct FSP parameter, but you want the one in src/soc/intel/cannonlake/romstage/fsp_params.c. You cannot increase this above 128MB IIRC; the default is 64MB, not sure where you’re getting 256MB from.

In a few versions down the line, this will likely be configurable via the UEFI setup options.

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Thanks! Are you the author of the Chromebook project? Your work is awesome!

I’ve been reviewing the file src/soc/intel/cannonlake/romstage/fsp_params.c and noticed the following:

/* Set IGD stolen size to 64MB. */
m_cfg->InternalGfx = 1;
m_cfg->IgdDvmt50PreAlloc = 2;

I’m not sure this is what I want to modify. According to the output from lspci, the prefetchable memory size is currently set to 256MB, and that’s the value I’d like to adjust.

00:02.0 VGA compatible controller: Intel Corporation CometLake-U GT2 [UHD Graphics] (rev 02) (prog-if 00 [VGA controller])
DeviceName: VGA compatible controller
Subsystem: Intel Corporation CometLake-U GT2 [UHD Graphics]
Flags: bus master, fast devsel, latency 0, IRQ 132, IOMMU group 0
Memory at b0000000 (64-bit, non-prefetchable) [size=16M]
Memory at a0000000 (64-bit, prefetchable) [size=256M]
I/O ports at 1000 [size=64]
Expansion ROM at 000c0000 [virtual] [disabled] [size=128K]
Capabilities:
Kernel driver in use: i915
Kernel modules: i915

Could you provide any guidance on how to modify the prefetchable memory size?
Thanks in advance!

I handle the firmware side of things and run mrchromebox.tech, yes.

These are the only items related to the internal GPU which are configurable:

/** Offset 0x00AD - Internal Graphics Pre-allocated Memory
  Size of memory preallocated for internal graphics.
  0x00:0 MB, 0x01:32 MB, 0x02:64 MB
**/
  UINT8                       IgdDvmt50PreAlloc;

/** Offset 0x00AE - Internal Graphics
  Enable/disable internal graphics.
  $EN_DIS
**/
  UINT8                       InternalGfx;

/** Offset 0x00AF - Aperture Size
  Select the Aperture Size.
  0:128 MB, 1:256 MB, 3:512 MB, 7:1024 MB, 15: 2048 MB
**/
  UINT8                       ApertureSize;

The aperture size is what you want, but is not currently “hooked up” in coreboot for cannonlake.

m_cfg->ApertureSize = {3/7/15};

added to src/soc/intel/cannonlake/romstage/fsp_params.c will do what you want