CCD open doesn’t seem to allow for AP flashing on my Chromebook (FLEEX, Dell 3100, N4000/single-USB trim) running an invalid AP (failed custom Coreboot build)
GSC and EC consoles freeze on AP init, and ccd testlab enable doesn’t work as it requires the PP to be pressed, which doesn’t seem to be available when then AP is powered off
I’m going insane here; I’ve tried across 3 different distros (VOID, Mint, now Ubuntu), and they all yield the same result
That flashrom output is the same as when CCD isn’t opened, btw
I’ve also run ccd reset factory, but this hasn’t helped at all
Logs:
Flashrom:
=> doas flashrom -p raiden_debug_spi:target=AP -w Sources/chromeboot/build/coreboot.img
flashrom on Linux 6.6.57_1 (x86_64)
flashrom is free software, get the source code at https://flashrom.org
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Raiden target: 2
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
GSC:
--- UART initialized after reboot ---
[Reset cause: power-on]
[Image: RW, 0.5.241/cr50_v4.11_mp.62-2ef05ac270 tpm2:v4.11_mp.2-08425f1 pinweaver:v0.0.156-ef94273 2024-03-13 00:31:03 @chromeos-ci-firmware-us-east1-d-x32-0-z01]
[0.004001 Inits done]
strap pin readings: a1:2 a9:2 a6:0 a12:0
[0.006179 Valid strap: 0xa properties: 0x41]
[0.007621 init_jittery_clock_locking_optional: run level high, request to enable]
[0.146175 init took 68646]
[0.155261 update_rollback_mask: bailing out at bit 1]
[0.157783 update_rollback_mask: bailing out at bit 4]
read_tpm_nvmem: object at 0x100a not found
[0.161510 Console unlock allowed]
[0.162498 tpm_rst_asserted]
read_tpm_nvmem: object at 0x1008 not found
[0.164150 load_ec_hash error: 0x1203]
[0.165107 FIPS power-up tests completed in 63667]
[0.166172 FIPS module digest a4459b5bcbda8970...]
[0.167095 Running in FIPS 140-2 approved mode]
Console is enabled; type HELP for help.
> [0.169731 EC RX only]
[0.173000 Rdd connect]
[1.162490 AP UART off]
[1.169944 Servo disconnect]
[1.170822 EC on]
[1.171459 CCD EXT enable]
[1.172008 USB PHY B]
[1.173015 CCD state: UARTEC+TX I2C SPI USBEC+TX]
[1.174091 I2C connect]
[1.175209 Initialized I2C port 0, freq = 100 kHz]
[1.360572 usb_reset, status 4801020]
[1.425697 usb_reset, status 1020]
[1.490074 SETAD 0x07 (7)]
[3.163352 AP off]
ccd open
[5.995098 tpm_reset_now(0)]
[5.998493 tpm_init]
[6.000148 tpm_manufactured: manufactured]
[6.004379 tpm_reset_now: done]
read_tpm_nvmem: object at 0x100a not found
[6.007381 Console unlock allowed]
[6.008121 CCD opened]
> [9.005714 Committing NVMEM changes.]